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Computer engineering cheat sheet

Digital logic, processors and hardware–software boundaries.

Binary representation

A bit has two states. With n bits there are 2ⁿ distinct bit patterns, before choosing how to interpret them.

8 bits → 256 possible patterns.

Logic gates

AND requires both inputs, OR requires at least one, and NOT inverts a Boolean value.

1 AND 0 = 0; 1 OR 0 = 1

Processor cycle

A simplified processor repeatedly fetches instructions, decodes them and executes the required operations.

An instruction and the data it uses are different information.

Memory and I/O

Memory stores information for computation; input/output connects computation with other devices and systems.

A sensor reading enters through an interface before a program processes it.

Unsigned and signed integers

An n-bit unsigned integer has values from 0 to 2ⁿ − 1. In n-bit two’s complement, the range is −2ⁿ⁻¹ to 2ⁿ⁻¹ − 1.

Eight bits represent 0–255 unsigned, or −128–127 in two’s complement.

Combinational and sequential logic

Combinational outputs depend on current inputs. Sequential circuits also depend on stored state, often updated according to a clock or another defined event.

An adder is combinational; a register stores state.

Latency and throughput

Latency is the time for one operation; throughput is completed operations per time. Pipelining can improve throughput without reducing the latency of one item.

A pipeline that finishes one result each cycle may still require several cycles for the first result.

Memory hierarchy

Registers, caches, main memory and storage differ in access cost, capacity and persistence. Locality explains why keeping recently or nearby used data can help.

A cache miss can add delay even when the processor’s clock frequency is unchanged.

Worked example: clock period

A 2 GHz clock has period 1/(2 × 10⁹) s = 0.5 ns. An operation taking four cycles takes 2 ns if its cycle count and clock rate remain fixed.

Clock rate alone does not determine program runtime; instruction count and cycles per instruction also matter.

Common mistake: overflow is impossible

Fixed-width arithmetic has a finite representation range. The interpretation of overflow depends on the representation and the language or hardware rules.

For an 8-bit unsigned result, 255 + 1 cannot be represented as the ordinary integer 256 in those same eight bits.

Check your understanding

How many distinct patterns can 10 bits encode?

2¹⁰ = 1024 patterns. The meaning assigned to each pattern is a separate choice.

Curriculum connections

Australia

Digital Technologies

data and representation · systems and networks · security and evaluation

Senior courses and assessment requirements are set by state and territory authorities.

ACARA · Technologies

Japan

情報Ⅰ・情報Ⅱ

data and representation · systems and networks · security and evaluation

MEXT course connections include optional and specialist subjects; the cards are original revision notes.

MEXT · 情報

United States

CSTA computer science framework

data and representation · systems and networks · security and evaluation

Courses vary by state and school. Common Core, NGSS, CSTA, ACTFL and AP are frameworks or pathways, not one federal curriculum.

CSTA · PK–12 computer science standards

United Kingdom

Computer Science / computing — England

data and representation · systems and networks · security and evaluation

England uses the GCSE/A level labels shown here. Scotland, Wales and Northern Ireland have their own curricula and qualifications.

DfE · GCSE subject content (England) DfE · AS and A level subject content (England)

Sources

MIT OCW · Computation Structures